\doxysection{TIM\+\_\+\+Handle\+Type\+Def Struct Reference}
\hypertarget{struct_t_i_m___handle_type_def}{}\label{struct_t_i_m___handle_type_def}\index{TIM\_HandleTypeDef@{TIM\_HandleTypeDef}}


TIM Time Base Handle Structure definition.  




{\ttfamily \#include $<$stm32h7xx\+\_\+hal\+\_\+tim.\+h$>$}

\doxysubsubsection*{Public Attributes}
\begin{DoxyCompactItemize}
\item 
\mbox{\hyperlink{struct_t_i_m___type_def}{TIM\+\_\+\+Type\+Def}} \texorpdfstring{$\ast$}{*} \mbox{\hyperlink{struct_t_i_m___handle_type_def_ad0c5f736a15f6d8d14724854c8133bcc}{Instance}}
\item 
\mbox{\hyperlink{struct_t_i_m___base___init_type_def}{TIM\+\_\+\+Base\+\_\+\+Init\+Type\+Def}} \mbox{\hyperlink{struct_t_i_m___handle_type_def_a8b2e61c3c4128e62cb7be7d35048152e}{Init}}
\item 
\mbox{\hyperlink{group___t_i_m___exported___types_gaa3fa7bcbb4707f1151ccfc90a8cf9706}{HAL\+\_\+\+TIM\+\_\+\+Active\+Channel}} \mbox{\hyperlink{struct_t_i_m___handle_type_def_ae9c5a11c1f5b27c808c0aca453e63870}{Channel}}
\item 
\mbox{\hyperlink{group___d_m_a___exported___types_ga41b754a906b86bce54dc79938970138b}{DMA\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*} \mbox{\hyperlink{struct_t_i_m___handle_type_def_a15338c71de82fa178c685be868e694bd}{hdma}} \mbox{[}7\mbox{]}
\item 
\mbox{\hyperlink{stm32h7xx__hal__def_8h_ab367482e943333a1299294eadaad284b}{HAL\+\_\+\+Lock\+Type\+Def}} \mbox{\hyperlink{struct_t_i_m___handle_type_def_a2a24b963b57150ed2fb0f051cd87b65a}{Lock}}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} \mbox{\hyperlink{group___t_i_m___exported___types_gae0994cf5970e56ca4903e9151f40010c}{HAL\+\_\+\+TIM\+\_\+\+State\+Type\+Def}} \mbox{\hyperlink{struct_t_i_m___handle_type_def_a6b6eeaf94f2e6e3d0a5bdac44adf21d6}{State}}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} \mbox{\hyperlink{group___t_i_m___exported___types_ga1a70fcbe9952e18af5c890e216a15f34}{HAL\+\_\+\+TIM\+\_\+\+Channel\+State\+Type\+Def}} \mbox{\hyperlink{struct_t_i_m___handle_type_def_a97dfe939e85a354c2dd8c66bef48e5a2}{Channel\+State}} \mbox{[}6\mbox{]}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} \mbox{\hyperlink{group___t_i_m___exported___types_ga1a70fcbe9952e18af5c890e216a15f34}{HAL\+\_\+\+TIM\+\_\+\+Channel\+State\+Type\+Def}} \mbox{\hyperlink{struct_t_i_m___handle_type_def_ac7648b2c1fd8d3fb38913fbad5379b11}{Channel\+NState}} \mbox{[}4\mbox{]}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} \mbox{\hyperlink{group___t_i_m___exported___types_ga9b87df539778a60ea940a9d5ba793f7c}{HAL\+\_\+\+TIM\+\_\+\+DMABurst\+State\+Type\+Def}} \mbox{\hyperlink{struct_t_i_m___handle_type_def_a985e3a4b24617ab917ed20e089e4ce83}{DMABurst\+State}}
\end{DoxyCompactItemize}


\doxysubsection{Detailed Description}
TIM Time Base Handle Structure definition. 

\label{doc-variable-members}
\Hypertarget{struct_t_i_m___handle_type_def_doc-variable-members}
\doxysubsection{Member Data Documentation}
\Hypertarget{struct_t_i_m___handle_type_def_ae9c5a11c1f5b27c808c0aca453e63870}\index{TIM\_HandleTypeDef@{TIM\_HandleTypeDef}!Channel@{Channel}}
\index{Channel@{Channel}!TIM\_HandleTypeDef@{TIM\_HandleTypeDef}}
\doxysubsubsection{\texorpdfstring{Channel}{Channel}}
{\footnotesize\ttfamily \label{struct_t_i_m___handle_type_def_ae9c5a11c1f5b27c808c0aca453e63870} 
\mbox{\hyperlink{group___t_i_m___exported___types_gaa3fa7bcbb4707f1151ccfc90a8cf9706}{HAL\+\_\+\+TIM\+\_\+\+Active\+Channel}} TIM\+\_\+\+Handle\+Type\+Def\+::\+Channel}

Active channel \Hypertarget{struct_t_i_m___handle_type_def_ac7648b2c1fd8d3fb38913fbad5379b11}\index{TIM\_HandleTypeDef@{TIM\_HandleTypeDef}!ChannelNState@{ChannelNState}}
\index{ChannelNState@{ChannelNState}!TIM\_HandleTypeDef@{TIM\_HandleTypeDef}}
\doxysubsubsection{\texorpdfstring{ChannelNState}{ChannelNState}}
{\footnotesize\ttfamily \label{struct_t_i_m___handle_type_def_ac7648b2c1fd8d3fb38913fbad5379b11} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} \mbox{\hyperlink{group___t_i_m___exported___types_ga1a70fcbe9952e18af5c890e216a15f34}{HAL\+\_\+\+TIM\+\_\+\+Channel\+State\+Type\+Def}} TIM\+\_\+\+Handle\+Type\+Def\+::\+Channel\+NState\mbox{[}4\mbox{]}}

TIM complementary channel operation state \Hypertarget{struct_t_i_m___handle_type_def_a97dfe939e85a354c2dd8c66bef48e5a2}\index{TIM\_HandleTypeDef@{TIM\_HandleTypeDef}!ChannelState@{ChannelState}}
\index{ChannelState@{ChannelState}!TIM\_HandleTypeDef@{TIM\_HandleTypeDef}}
\doxysubsubsection{\texorpdfstring{ChannelState}{ChannelState}}
{\footnotesize\ttfamily \label{struct_t_i_m___handle_type_def_a97dfe939e85a354c2dd8c66bef48e5a2} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} \mbox{\hyperlink{group___t_i_m___exported___types_ga1a70fcbe9952e18af5c890e216a15f34}{HAL\+\_\+\+TIM\+\_\+\+Channel\+State\+Type\+Def}} TIM\+\_\+\+Handle\+Type\+Def\+::\+Channel\+State\mbox{[}6\mbox{]}}

TIM channel operation state \Hypertarget{struct_t_i_m___handle_type_def_a985e3a4b24617ab917ed20e089e4ce83}\index{TIM\_HandleTypeDef@{TIM\_HandleTypeDef}!DMABurstState@{DMABurstState}}
\index{DMABurstState@{DMABurstState}!TIM\_HandleTypeDef@{TIM\_HandleTypeDef}}
\doxysubsubsection{\texorpdfstring{DMABurstState}{DMABurstState}}
{\footnotesize\ttfamily \label{struct_t_i_m___handle_type_def_a985e3a4b24617ab917ed20e089e4ce83} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} \mbox{\hyperlink{group___t_i_m___exported___types_ga9b87df539778a60ea940a9d5ba793f7c}{HAL\+\_\+\+TIM\+\_\+\+DMABurst\+State\+Type\+Def}} TIM\+\_\+\+Handle\+Type\+Def\+::\+DMABurst\+State}

DMA burst operation state \Hypertarget{struct_t_i_m___handle_type_def_a15338c71de82fa178c685be868e694bd}\index{TIM\_HandleTypeDef@{TIM\_HandleTypeDef}!hdma@{hdma}}
\index{hdma@{hdma}!TIM\_HandleTypeDef@{TIM\_HandleTypeDef}}
\doxysubsubsection{\texorpdfstring{hdma}{hdma}}
{\footnotesize\ttfamily \label{struct_t_i_m___handle_type_def_a15338c71de82fa178c685be868e694bd} 
\mbox{\hyperlink{group___d_m_a___exported___types_ga41b754a906b86bce54dc79938970138b}{DMA\+\_\+\+Handle\+Type\+Def}}\texorpdfstring{$\ast$}{*} TIM\+\_\+\+Handle\+Type\+Def\+::hdma\mbox{[}7\mbox{]}}

DMA Handlers array This array is accessed by a \doxylink{group___d_m_a___handle__index}{TIM DMA Handle Index} \Hypertarget{struct_t_i_m___handle_type_def_a8b2e61c3c4128e62cb7be7d35048152e}\index{TIM\_HandleTypeDef@{TIM\_HandleTypeDef}!Init@{Init}}
\index{Init@{Init}!TIM\_HandleTypeDef@{TIM\_HandleTypeDef}}
\doxysubsubsection{\texorpdfstring{Init}{Init}}
{\footnotesize\ttfamily \label{struct_t_i_m___handle_type_def_a8b2e61c3c4128e62cb7be7d35048152e} 
\mbox{\hyperlink{struct_t_i_m___base___init_type_def}{TIM\+\_\+\+Base\+\_\+\+Init\+Type\+Def}} TIM\+\_\+\+Handle\+Type\+Def\+::\+Init}

TIM Time Base required parameters \Hypertarget{struct_t_i_m___handle_type_def_ad0c5f736a15f6d8d14724854c8133bcc}\index{TIM\_HandleTypeDef@{TIM\_HandleTypeDef}!Instance@{Instance}}
\index{Instance@{Instance}!TIM\_HandleTypeDef@{TIM\_HandleTypeDef}}
\doxysubsubsection{\texorpdfstring{Instance}{Instance}}
{\footnotesize\ttfamily \label{struct_t_i_m___handle_type_def_ad0c5f736a15f6d8d14724854c8133bcc} 
\mbox{\hyperlink{struct_t_i_m___type_def}{TIM\+\_\+\+Type\+Def}}\texorpdfstring{$\ast$}{*} TIM\+\_\+\+Handle\+Type\+Def\+::\+Instance}

Register base address \Hypertarget{struct_t_i_m___handle_type_def_a2a24b963b57150ed2fb0f051cd87b65a}\index{TIM\_HandleTypeDef@{TIM\_HandleTypeDef}!Lock@{Lock}}
\index{Lock@{Lock}!TIM\_HandleTypeDef@{TIM\_HandleTypeDef}}
\doxysubsubsection{\texorpdfstring{Lock}{Lock}}
{\footnotesize\ttfamily \label{struct_t_i_m___handle_type_def_a2a24b963b57150ed2fb0f051cd87b65a} 
\mbox{\hyperlink{stm32h7xx__hal__def_8h_ab367482e943333a1299294eadaad284b}{HAL\+\_\+\+Lock\+Type\+Def}} TIM\+\_\+\+Handle\+Type\+Def\+::\+Lock}

Locking object \Hypertarget{struct_t_i_m___handle_type_def_a6b6eeaf94f2e6e3d0a5bdac44adf21d6}\index{TIM\_HandleTypeDef@{TIM\_HandleTypeDef}!State@{State}}
\index{State@{State}!TIM\_HandleTypeDef@{TIM\_HandleTypeDef}}
\doxysubsubsection{\texorpdfstring{State}{State}}
{\footnotesize\ttfamily \label{struct_t_i_m___handle_type_def_a6b6eeaf94f2e6e3d0a5bdac44adf21d6} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} \mbox{\hyperlink{group___t_i_m___exported___types_gae0994cf5970e56ca4903e9151f40010c}{HAL\+\_\+\+TIM\+\_\+\+State\+Type\+Def}} TIM\+\_\+\+Handle\+Type\+Def\+::\+State}

TIM operation state 

The documentation for this struct was generated from the following file\+:\begin{DoxyCompactItemize}
\item 
C\+:/\+Users/\+ASUS/\+Desktop/dm-\/ctrl\+H7-\/balance-\/9025test/\+Drivers/\+STM32\+H7xx\+\_\+\+HAL\+\_\+\+Driver/\+Inc/\mbox{\hyperlink{stm32h7xx__hal__tim_8h}{stm32h7xx\+\_\+hal\+\_\+tim.\+h}}\end{DoxyCompactItemize}
